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January 1993


Workshops and short courses are a vital part of the CRPC's plan for the dissemination of center knowledge of parallel computing to other institutions. The CRPC has sponsored or participated in outreach activities that have been particularly effective in introducing new research methods and technologies in parallel computing by addressing targeted audiences from industry, academia, and government. The following activities are a few recent examples.

NCSA/CRPC Workshop on Scalable Computing Technologies

From the outset, one of the goals of the Center for Research on Parallel Computation has been to transfer high-performance, scalable parallel computing technology to the science and engineering community. However, this goal has proved difficult to achieve because of the CRPC's small size. The problem is leverage: how can a relatively small research organization carry out an education program for the entire community of high performance computing users? One way is to enlist the assistance of the national and regional supercomputer centers, all of which carry out educational programs for their users. If the CRPC could design an instructional program for parallel computing and transfer this program, along with supporting materials, to supercomputer staff members, these staff members could teach it to their users.

This idea has led to a program, developed in collaboration with the NSF supercomputer centers that together form the "Metacenter," to teach the latest methods emerging from parallel computing research to center staff from all over the nation. The first workshop in this program was held October 18-22, 1993, at the National Center for Supercomputing Applications (NCSA) at the University of Illinois at Urbana-Champaign. Participants included staff at the CRPC, the NCSA, the San Diego Supercomputer Center (SDSC), the Pittsburgh Supercomputing Center, and the Cornell Theory Center. The five-day course covered the entire spectrum of parallel computing topics: parallel computer architecture (Andrew Chien), parallel application classes and enabling technologies (Geoffrey Fox) High Performance Fortran (Ken Kennedy, Chuck Koelbel), PVM (Adam Beguelin), Fortran M (Ian Foster), parallel C++ (Dennis Gannon), performance visualization (Dan Reed), linear algebra (Dan Sorensen), numerical optimization (John Dennis, Jorge Moré), partial differential equations (Phil Keenan, Lawrence Cowsar, Eric van de Velde), parallel I/O (Joe Godsil) and applications (Joel Saltz, Bob Wilhelmson).

In contrast to the earlier generation of high-performance vector supercomputers, where a substantial body of experience developed at national laboratories and supercomputer centers, massively parallel systems have emerged rapidly and without formal technology transfer paths. By training and supporting the teaching staff members at national, regional, and state supercomputer centers, the CRPC hopes to disseminate information about the current state of massively parallel computing technology to the largest number of potential users, since these staff members actively and continuously conduct courses to instruct scientists on the use of available computing resources. Over the next several years, the CRPC and the NSF Metacenter plan to continue and expand this program. The next staff workshop in the series is scheduled for fall 1994 at the San Diego Supercomputer Center.

High Performance Fortran Forum II Kickoff Meeting

The second round of the High Performance Fortran Forum (HPFF) began on January 13-14, 1994 in Houston, TX. HPFF II follows HPFF, a related series of meetings in 1992 and 1993 that resulted in the development of version 1.0 of the High Performance Fortran (HPF) programming language, an informal standard Fortran language portable from clusters of workstations to massively parallel supercomputers.

The goal of HPFF II is to help make HPF complete so that it can serve as a programming interface for the new parallel machines that are appearing on the market. Part of this objective requires making it usable by 95% of the data-parallel applications that are being used in the high performance community. The HPFF II group is examining problems with parallel input/output, task parallel, and irregular scientific problems that HPF 1.0 does not effectively handle. The group will also discuss compiler and programming environment implementation experience to encourage truly high performance support. (The D System created by CRPC researchers will play a prominent role in this discussion.)

At the January meeting, many vendors and researchers presented their progress in HPF implementations. Chuck Koelbel, Executive Director of the first HPFF series of meetings, noted that, "It's fair to say that reasonable implementations of HPF will be appearing throughout 1994 and early 1995. Presentations by users and vendor reports of user experience indicate that HPF is gaining acceptance and solves several practical problems."

The overall conclusion of the meeting was to gain more implementation experience with HPF before extending the language even further. To that end, HPFF will meet four more times in 1994 (April 6-8, June 1-3, August 17-19, and October 12-14) to correct, clarify, and interpret HPF version 1.0 and describe requirements for HPF version 2.0. Organizers for HPFF II hope to finish this work in one year, producing an improved version of the language definition and requirements for future extensions. These reports will be distributed to interested parties. Additionally, HPFF II will encourage the use of HPF among users and implementors. As in the past HPFF meetings, meeting notes will be widely distributed through e-mail and newsgroups.

Parallel I/O "Interfaces" Workshop

The Parallel I/O "Interfaces Workshop (held on January 20-21 in Dallas, TX) addressed issues related to parallel file systems on high- performance computers, user libraries for parallel I/O, compiler runtime libraries for parallel I/O, and compiler support for large-scale "out-of -core" problems. The main goal of this workshop was to understand the capabilities of various parallel file systems and determine the appropriate interfaces available to the runtime and compiler software layers.

Representatives from industrial organizations, including IBM and Intel, presented their current designs of the file systems as well as their future plans. Some groups presented the compiler and runtime system requirements in terms of what is desired from a file system. The issues of portability, ease of use, optimizations (such as prefetching), and other issues were discussed. The presentations were followed by informative discussions to address concrete issues.

Three subgroups were formed for the following topics: compiler and runtime systems, user libraries, and checkpointing. These subgroups discussed in more detail issues related to the respective topics. The compiler and runtime systems group helped to determine the type of functionality required by these software layers from the file systems. Furthermore, this group discussed what a file system may expect in terms of "hints" from these layers for optimizations. The aim of the user libraries group was to determine the requirements to support user applications when they were directly parallelized (as opposed to going through a parallelizing compiler such as the HPF compiler). The user libraries group also determined requirements for real-time output (e.g., for visualization). Furthermore, this group also addressed the problem of parallel data transfer from one system to another. The third group was charged with the issues involved in providing support for checkpointing in parallel file systems. Each group will contribute to a report that will help guide the research and development in all of the above software layers. The most important outcome of this workshop was that each of these specific groups had a more thorough understanding of their own needs and requirements for the other groups and vice versa. For example, the compiler and runtime systems group expected certain functionality from the file systems group (within which there were differences) and the members of the file system group understood what these expectations were as a result of the workshop. Furthermore, each group obtained feedback that is expected to be useful in subsequent designs and implementations.

For further information on this workshop, contact Alok Choudhary at Syracuse University ( choudhar@cat.syr.edu ).

"Parallel Computation: Practice, Perspectives, and Potential" Short Course at Caltech

The CRPC held "Parallel Computation: Practice, Perspectives, and Potential," a one-day course on January 24 at Caltech that introduced participants to the tools, languages, architectures, applications, technology transfer, and program development methods in parallel computing.

Several of the instructors, all of whom were CRPC researchers, noted the positive feedback that they received about the course. Mani Chandy of Caltech said, "The participants seemed to like the tutorial and demonstrations very much. The audience included several people who were planning to introduce parallel computing to their groups in companies from southern California and all over the country. I would certainly like to see this course repeated in the future." John Dennis of Rice University also noted a responsive audience: "They were all very involved in the course. Even near the end of the day, my talk on multidisciplinary optimization generated some follow-up correspondence from participants who stayed to chat about the subject after the course."

Most important, the short course was very successful in informing the public about the CRPC's research activities. Dan Meiron of Caltech cited an example from the joint activity on templates between the CRPC's paradigm integration group and the differential equations groups. "Various scientific programmers who attended were interested in using templates for their particular application. From a user's point of view, using the template to achieve portable parallelism is quite attractive because much of their already large investment in constructing various sequential codes is retained."

Meiron also noted that short courses like this one will be helpful in enabling user feedback to help guide CRPC research. "The comments we received will help us a great deal because they will give us a feel for the needs of the scientific community and we will no doubt consider directing our future efforts toward those needs."

Workshop on Task Parallelism in Fortran

Held on February 9-10 at Caltech, the "Workshop on Task Parallelism in Fortran" discussed task-parallel extensions to Fortran, with a particular focus on the requirements of distributed-memory computers. The workshop did not discuss standards, but rather focused on identifying groups of institutions taking similar approaches so that these groups can share information. Participants in the workshop included hardware vendors, software vendors, and applications developers from businesses, government, and universities.

The workshop was structured as a moderated discussion of task- parallelism and paradigm integration in Fortran. In the first session, participants attempted to answer questions such as "What kinds of applications need task parallelism?"; "Will task parallelism become more or less important in the future?"; and "Is task parallelism in Fortran important?" Specific discussions covered approaches to creating concurrent threads of execution, methods of synchronizing and data sharing between concurrent processes, interfaces to task parallelism, and methods for developing, debugging, testing, and reasoning about parallel programs. Portability across single workstations, symmetric multiprocessors, multicomputers, and heterogeneous networks was also discussed, along with approaches to implementation.

The brief discussion of paradigm integration touched upon many of the issues covered in the first session, but also included discussions on the relationship of task parallelism to other parallel programming paradigms, the mechanisms for using multiple paradigms in Fortran programs, and the requirements for paradigm integration in scientific and engineering applications.

Workshop coordinators Mani Chandy of Caltech and Ian Foster of Argonne were both particularly pleased to see a constructive dialogue develop between proponents of different approaches to task parallelism and between researchers and vendor representatives. In addition, several participants suggested that the ideas developed in this workshop would be useful to the HPF Forum when it came time to consider the issue of task parallelism in High Performance Fortran.

The workshop revealed both issues on which strong consensus exists (e.g., thread creation mechanisms) and areas where more research is required to evaluate alternative approaches (e.g., communication mechanisms). An electronic mail reflector ( tpf@mcs.anl.gov ) was created for the purpose of communication between workshop participants. In addition, participants agreed to collaborate on the construction of a task parallel program suite. Bhaven Avalani ( avalani@nova.npac.syr.edu ) at Syracuse University will maintain a repository of application descriptions and source code, and Piyush Mehrotra at ICASE ( pm@icase.edu ) will develop a challenge set of problem kernels for language and compiler developers.

Workshop participants will produce a report summarizing the views of the participants and the corresponding institutions that plan to share information about their approaches to task-parallel Fortran. The report will be distributed to government agencies and will be available later this spring by anonymous ftp from directory pub/tpf at info.mcs.anl.gov. For more information, please contact Ian Foster ( foster@mcs.anl.gov ) or Mani Chandy ( mani@cs.caltech.edu ).

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